IPC J-STD-013

This document establishes the requirements and interactions necessary for printed board assembly processes for interconnecting high performance/high pin count IC packages. Includes information on design principles, material selection, board fabrication, assembly technology, testing strategy and reliability expectations based on end-use environments. Co-produced with EIA, MCNC and Sematech.



Product Code(s): J-013(D)1

This product is related to: IPC J-STD-012 - Implementation of Flip Chip and Chip Scale Technology
IPC J-STD-026 - Semiconductor Design Standard for Flip Chip Applications
IPC J-STD-028 - Performance Standard fo Construction of Flip Chip and Chip Scale Bumps
IPC M-103 - Standards for Surface Mount Assemblies Manual
IPC SM-784 - Guidelines for Chip-on-Board Technology Implementation
IPC J-STD-012 - Implementation of Ball Grid Array and Other High Density Technology
IPC M-103 - Implementation of Ball Grid Array and Other High Density Technology
IPC SM-784 - Implementation of Ball Grid Array and Other High Density Technology