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BS EN 60191-6-17:2011

Standard Number
BS EN 60191-6-17:2011
Title
Mechanical standardization of semiconductor devicesGeneral rules for the preparation of outline drawings of surface mounted semiconductor device packages. Design guide for stacked packages. Fine-pitch ball grid array and fine-pitch land grid array (P-PFBGA and P-PFLGA)
Status
Current
Publication Date
30 June 2011
Cross References
IEC 60191-6, IEC 60191-6-5, EN 60191-6, EN 60191-6-5

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Descriptors
Semiconductor devices, Electronic equipment and components, Standardization, Drawings, Engineering drawings, Technical drawing, Packages, Dimensions, Interchangeability, Surface mounting devices, Integrated circuits, Designations, Design
Title in French
Normalisation mcanique des dispositifs semiconducteurs. Rgles gnrales pour la prparation des dessins dencombrement des dispositifs semiconducteurs montage en surface. Guide de conception pour les botiers emplils. Botiers matriciels billes et pas fins et botiers matriciels zone de contact plate et pas fins (P-PFBGA et P-PFLGA)
Title in German
Mechanische Normung von Halbleiterbauelementen. Allgemeine Regeln fr die Erstellung von Gehusezeichnungen von SMD-Halbleitergehusen. Konstruktionsleitfaden fr gestapelte Gehuse. Feinraster-Ball-Grid-Array und Feinraster-Land-Grid-Array (P-PFBGA/P-PFLGA)
Pages
32
File Size
1.415 MB
Price
140.00

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